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220–320-GHz J-Band 4-Way Power Amplifier in Advanced 130-nm BiCMOS Technology
IEEE Microwave and Wireless Components Letters ( IF 3 ) Pub Date : 2022-06-15 , DOI: 10.1109/lmwc.2022.3181407
Eissa Mohamed 1 , Gunter Fischer 1 , Thomas Mausolf 1 , Holger Ruecker 1 , Andrea Malignaggi 1 , Gerhard Kahmen 1
Affiliation  

A power combined wideband power amplifier (PA) covering the $J$ -band (220–320 GHz) is presented in 130-nm BiCMOS technology. The input power is split by two cascaded 1-to-2 power splitters with amplification stages in-between. The four split signals drive four output stages, which have their outputs combined within a 4-way zero-degree combiner. The splitting and combining networks also incorporate impedance matching. After de-embedding the I/O pads and baluns of 2 dB loss at each side, the PA achieves a gain of 20 dB at the middle of the band and a minimum gain of 17 dB at 320 GHz with I/O return losses below −5 dB. The PA records a saturated output power ranging from 9.5 to 14.5 dBm across the $J$ -band. It consumes 710 mW from a 3 V supply which corresponds to a drain efficiency ( $\eta _{d}$ ) of 3.15% at 270 GHz. The presented PA achieves twice better bandwidth with 1.5 times better $\eta _{d}$ than the state-of-the-art silicon-based amplifiers above 200 GHz. To the authors’ knowledge, this is the first PA covering the whole $J$ -band in silicon technologies.

中文翻译:

采用先进 130-nm BiCMOS 技术的 220–320-GHz J 波段 4 路功率放大器

一种功率组合宽带功率放大器(PA),涵盖 $J$ 波段 (220–320 GHz) 采用 130-nm BiCMOS 技术。输入功率由两个级联的 1 对 2 功率分配器分配,中间有放大级。四个分离信号驱动四个输出级,它们的输出在一个 4 路零度组合器内组合。分裂和组合网络还包含阻抗匹配。在去嵌入每侧 2 dB 损耗的 I/O 焊盘和平衡-不平衡转换器后,PA 在频带的中间实现 20 dB 的增益,在 320 GHz 下实现 17 dB 的最小增益,I/O 回波损耗低于-5分贝。PA 记录的饱和输出功率范围为 9.5 至 14.5 dBm $J$ -乐队。它从 3 V 电源消耗 710 mW,对应于漏极效率( $\eta _{d}$ ) 在 270 GHz 时为 3.15%。所提出的 PA 实现了两倍的带宽,提高了 1.5 倍 $\eta _{d}$高于 200 GHz 以上最先进的硅基放大器。据作者所知,这是第一个涵盖整个 $J$ - 硅技术波段。
更新日期:2022-06-15
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