A gate stack that facilitates a high-quality interface and tight electrostatic control is crucial for realizing high-performance and low-power field-effect transistors (FETs). However, when constructing conventional metal-oxide-semiconductor structures with two-dimensional (2D) transition metal dichalcogenide channels, achieving these requirements becomes challenging due to inherent difficulties in obtaining high-quality gate dielectrics through native oxidation or film deposition. Here, a gate-dielectric-less device architecture of van der Waals Schottky gated metal–semiconductor FETs (vdW-SG MESFETs) using a molybdenum disulfide (MoS₂) channel and surface-oxidized metal gates such as nickel and copper is reported. Benefiting from the strong SG coupling, these MESFETs operate at remarkably low gate voltages, <0.5 V. Notably, they also exhibit Boltzmann-limited switching behavior featured by a subthreshold swing of ≈60 mV dec⁻¹ and negligible hysteresis. These ideal FET characteristics are attributed to the formation of a Fermi-level (E_F) pinning-free gate stack at the Schottky–Mott limit. Furthermore, authors experimentally and theoretically confirm that E_F depinning can be achieved by suppressing both metal-induced and disorder-induced gap states at the interface between the monolithic-oxide-gapped metal gate and the MoS₂ channel. This work paves a new route for designing high-performance and energy-efficient 2D electronics.

中文翻译：

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通过单片氧化物间隙金属栅极在肖特基-莫特极限下实现玻尔兹曼开关 MoS2 金属半导体场效应晶体管

有助于实现高质量接口和严格静电控制的栅极堆叠对于实现高性能和低功耗场效应晶体管 (FET) 至关重要。然而，当构建具有二维（2D）过渡金属二硫属化物沟道的传统金属氧化物半导体结构时，由于通过自然氧化或薄膜沉积获得高质量栅极电介质的固有困难，实现这些要求变得具有挑战性。在此，报道了一种使用二硫化钼 ( _MoS2 ) 通道和表面氧化金属栅极（例如镍和铜）的范德华肖特基门控金属半导体 FET (vdW-SG MESFET) 的无栅极电介质器件架构。受益于强 SG 耦合，这些 MESFET 在极低的栅极电压（<0.5 V）下工作。值得注意的是，它们还表现出玻尔兹曼限制的开关行为，其特点是亚阈值摆幅约为 60 mV dec ^-1和可忽略不计的滞后。这些理想的 FET 特性归因于在肖特基-莫特极限下形成费米能级 ( EF ₎无钉扎栅堆叠。此外，作者通过实验和理论上证实，E _F脱钉可以通过抑制单片氧化物带隙金属栅极和 MoS ₂沟道之间界面处的金属诱导和无序诱导的带隙态来实现。这项工作为设计高性能和节能的二维电子产品开辟了一条新途径。