Charge storage synaptic circuits employing InGaZnO thin‐film transistors (IGZO TFTs) and capacitors are a promising candidate for on‐chip trainable neural network hardware accelerators. However, IGZO TFTs often exhibit bias instability. For synaptic memory applications, the programming transistors are predominantly exposed to asymmetric off‐state biases, and a unique field‐dependent on‐current reduction under off‐scenario is observed which may result in programming current variation. Further examination of the phenomenon is conducted with transmission line‐like method and degradation recovery tests, and current reduction can be attributed to contact resistance increase by charge trapping in the source and drain electrode and the channel region. The current decrease is subsequently formulated with a stretched exponential model with bias‐dependent parameters for quantitative circuit analysis under off‐state degradation. A neural network hardware acceleration simulator is utilized to assess the complicated impact the off‐state current degradation could instigate on on‐chip trainable IGZO TFT‐based synapse arrays. The simulation results generally demonstrate deteriorated training accuracy with aggravated off‐state instability, and the accuracy trend is elucidated from the perspective of weight symmetry point.

中文翻译：

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InGaZnO 薄膜晶体管场致断态不稳定性及其对突触电路的影响

采用 InGaZnO 薄膜晶体管 (IGZO TFT) 和电容器的电荷存储突触电路是片上可训练神经网络硬件加速器的有希望的候选者。然而，IGZO TFT 通常表现出偏置不稳定。对于突触存储器应用，编程晶体管主要暴露于不对称断态偏置，并且观察到断态情况下独特的场相关导通电流减少，这可能导致编程电流变化。通过类似传输线的方法和退化恢复测试对该现象进行了进一步检查，电流减少可归因于源极、漏极和沟道区域中的电荷俘获导致的接触电阻增加。随后用具有偏置相关参数的拉伸指数模型来表述电流的减小，以用于断态退化下的定量电路分析。利用神经网络硬件加速模拟器来评估断态电流退化可能对基于片上可训练 IGZO TFT 的突触阵列产生的复杂影响。仿真结果普遍表明训练精度下降，断态不稳定性加剧，并且从权重对称点的角度阐明了精度趋势。